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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
4 Device Operating Conditions
For the device maximum operating frequency, see Section 6.1.2 , Device and Development-Support Tool
Nomenclature .
4.1
Absolute Maximum Ratings Over Operating Case Temperature Range (Unless
Otherwise Noted) (1)
Supply voltage ranges:
Input and Output voltage ranges:
Operating case temperature ranges, T c :
Storage temperature range, T stg
Digital Core (CV DD , CV DDRTC , USB_V DD1P3 ) (2)
I/O, 1.8 V, 2.5 V, 2.75 V, 3.3 V (DV DDIO , DV DDEMIF ,
DV DDRTC ) 3.3V USB supplies USB PHY (USB_V DDOSC ,
USB_V DDPLL , USB_V DDA3P3 ) (2)
LDOI
Analog, 1.3 V (V DDA_PLL , USB_V DDA1P3 , V DDA_ANA ) (2)
V I I/O, All pins with DV DDIO or DV DDEMIF or USB_V DDOSC or
USB_V DDPLL or USB_V DDA3P3 as supply source
V O I/O, All pins with DV DDIO or DV DDEMIF or USB_V DDOSC or
USB_V DDPLL or USB_V DDA3P3 as supply source
RTC_XI and RTC_XO
USB_V BUS Input
V I and V O , GPAIN[0]
V I and V O , GPAIN[3:1]
V O , BG_CAP
ANA_LDOO, DSP_LDOO, and USB_LDOO
Commercial Temperature (default)
Industrial Temperature
(default)
–0.5 V to 1.7 V
–0.5 V to 4.2 V
–0.5 V to 4.2 V
–0.5 V to 1.7 V
–0.5 V to 4.2 V
–0.5 V to 4.2 V
–0.5 V to 1.7 V
–0.5 V to 5.5 V
–0.5 V to 4.2 V
–0.5 V to 1.7 V
–0.5 V to 1.7 V
–0.5 V to 1.7 V
-10°C to 70°C
-40°C to 85°C
–65°C to 150°C
Device Operating Life
Power-On Hours (POH)
ESD Stress Voltage (4)
(3)
DSP Operating Frequency
(SYSCLK ) ≤ 100 MHz
DSP Operating Frequency
(SYSCLK):
>100 MHz - ≤ 120 MHz
Human Body Model (HBM) (5)
<70 °C
≥ 70 °C - ≤ 85 °C
<70 °C
≥ 70 °C - ≤ 85 °C
100,000 POH
100,000 POH
100,000 POH
80,000 POH
> 1000 V
Charged Device Model (CDM) (6)
> 250 V
(1)
(2)
(3)
(4)
(5)
(6)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to V SS.
This information is provided solely for your convenience and does not extend or modify the warranty provided under TI’s standard terms
and conditions for TI semiconductor products.
Electrostatic discharge (ESD) to measure device sensitivity/immunity to damage caused by electrostatic discharges into the device.
Level listed is the passing level per ANSI/ESDA/JEDEC JS-001-2010. JEDEC document JEP155 states that 500 V HBM allows safe
manufacturing with a standard ESD control process, and manufacturing with less than 500 V HBM is possible if necessary precautions
are taken. Pins listed as 1000 V may actually have higher performance.
Level listed is the passing level per EIA-JEDEC JESD22-C101E. JEDEC document JEP157 states that 250 V CDM allows safe
manufacturing with a standard ESD control process. Pins listed as 250 V may actually have higher performance.
Copyright ? 2010–2013, Texas Instruments Incorporated
Product Folder Links: TMS320C5515
Device Operating Conditions
67
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